00001 00004 #ifndef __DEV1000_H__ 00005 #define __DEV1000_H__ 00006 00007 #include <vstypes.h> 00008 00009 #define PATCH_TEST_UNIT_READY /*PatchMSCPacketFromPC() calls ScsiTestUnitReady()*/ 00010 #define MMC_MISO_BIT 8 /*NFRDY with 10kOhm pull-up*/ 00011 #define MMC_MOSI_BIT 12 /*NFCLE*/ 00012 #define MMC_CLK (1<<9) /*NFRD*/ 00013 #define MMC_MOSI (1<<MMC_MOSI_BIT) 00014 #define MMC_MISO (1<<MMC_MISO_BIT) 00015 #define MMC_XCS (1<<11) /*NFWR*/ 00016 00017 #define MMC_GO_IDLE_STATE 0 00018 #define MMC_SEND_OP_COND 1 00019 #define MMC_SEND_IF_COND 8 00020 #define MMC_SEND_CSD 9 00021 #define MMC_SEND_CID 10 00022 #define MMC_SEND_STATUS 13 00023 #define MMC_SET_BLOCKLEN 16 00024 #define MMC_READ_SINGLE_BLOCK 17 00025 #define MMC_WRITE_BLOCK 24 00026 #define MMC_PROGRAM_CSD 27 00027 #define MMC_SET_WRITE_PROT 28 00028 #define MMC_CLR_WRITE_PROT 29 00029 #define MMC_SEND_WRITE_PROT 30 00030 #define MMC_TAG_SECTOR_START 32 00031 #define MMC_TAG_SECTOR_END 33 00032 #define MMC_UNTAG_SECTOR 34 00033 #define MMC_TAG_ERASE_GROUP_START 35 00034 #define MMC_TAG_ERARE_GROUP_END 36 00035 #define MMC_UNTAG_ERASE_GROUP 37 00036 #define MMC_ERASE 38 00037 #define MMC_READ_OCR 58 00038 #define MMC_CRC_ON_OFF 59 00039 #define MMC_R1_BUSY 0x80 00040 #define MMC_R1_PARAMETER 0x40 00041 #define MMC_R1_ADDRESS 0x20 00042 #define MMC_R1_ERASE_SEQ 0x10 00043 #define MMC_R1_COM_CRC 0x08 00044 #define MMC_R1_ILLEGAL_COM 0x04 00045 #define MMC_R1_ERASE_RESET 0x02 00046 #define MMC_R1_IDLE_STATE 0x01 00047 #define MMC_STARTBLOCK_READ 0xFE 00048 #define MMC_STARTBLOCK_WRITE 0xFE 00049 #define MMC_STARTBLOCK_MWRITE 0xFC 00050 #define MMC_STOPTRAN_WRITE 0xFD 00051 #define MMC_DE_MASK 0x1F 00052 #define MMC_DE_ERROR 0x01 00053 #define MMC_DE_CC_ERROR 0x02 00054 #define MMC_DE_ECC_FAIL 0x04 00055 #define MMC_DE_OUT_OF_RANGE 0x04 00056 #define MMC_DE_CARD_LOCKED 0x04 00057 #define MMC_DR_MASK 0x1F 00058 #define MMC_DR_ACCEPT 0x05 00059 #define MMC_DR_REJECT_CRC 0x0B 00060 #define MMC_DR_REJECT_WRITE_ERROR 0x0D 00061 00062 #ifdef ASM 00063 00064 #else /*elseASM*/ 00065 00071 auto u_int16 SpiSendReceiveMmc(register __a0 u_int16 dataTopAligned, 00072 register __a1 bits); 00075 auto void SpiSendClocks(void); 00081 auto u_int16 MmcCommand(register __b0 s_int16 cmd, register __d u_int32 arg); 00082 00085 void PatchMSCPacketFromPC(void *); /* Set MSCPacketFromPC hook here. */ 00087 void ScsiTestUnitReady(void); 00088 00098 auto u_int16 Fat12OpenFile(register __c0 u_int16 fileNum); 00099 00105 auto u_int16 OpenFileBaseName(register __i2 const u_int16 *packedName); 00110 void PlayRangeSet(u_int32 start, u_int32 end); 00115 void PlayRange(void); 00117 void puthex(u_int16 d); 00118 00121 void KeyScan7(void); 00122 #define KEY_6 (1<<5) 00123 00128 void Suspend7(void); 00129 00130 auto u_int16 MapperlessReadDiskSector(register __i0 u_int16 *buffer, 00131 register __reg_a u_int32 sector); 00132 00133 00134 /* 00135 Some low-level NAND-interface routines that are useful with parallel 00136 displays. You must handle CS yourself. 00137 */ 00138 void NandPutCommand(register __a0 u_int16 command); 00139 void NandPutAddressOctet(register __a0 u_int16 address); 00140 void NandGetOctets(register __c0 s_int16 length, register __i2 u_int16 *buf); 00141 void NandPutOctets(register __c0 s_int16 length, register __i2 u_int16 *buf); 00142 void NandSetWaits(register __a0 u_int16 waitns); 00144 u_int32 ReadIRam(register __i0 u_int16 addr); 00145 void WriteIRam(register __i0 u_int16 addr, register __a u_int32 ins); 00162 void InterruptStub0(void); 00163 void InterruptStub1(void); 00164 void InterruptStub2(void); 00165 void InterruptStub3(void); 00166 auto void Interrupt0(void); 00167 auto void Interrupt1(void); 00168 auto void Interrupt2(void); 00169 auto void Interrupt3(void); 00192 void Rc5Init(u_int16 vector); 00193 u_int16 Rc5GetFIFO(void); 00195 #define RC5_SYS_TVSET 0 00196 #define RC5_SYS_TELETEXT 2 00197 #define RC5_SYS_VCR 5 00198 #define RC5_SYS_EXPERIMENTAL7 7 00199 #define RC5_SYS_PREAMP 16 00200 #define RC5_SYS_RECEIVERTUNER 17 00201 #define RC5_SYS_TAPERECORDER 18 00202 #define RC5_SYS_EXPERIMENTAL19 19 00203 #define RC5_SYS_CDPLAYER 20 00204 00205 #define RC5_CMD_0 0 00206 #define RC5_CMD_1 1 00207 #define RC5_CMD_2 2 00208 #define RC5_CMD_3 3 00209 #define RC5_CMD_4 4 00210 #define RC5_CMD_5 5 00211 #define RC5_CMD_6 6 00212 #define RC5_CMD_7 7 00213 #define RC5_CMD_8 8 00214 #define RC5_CMD_9 9 00215 #define RC5_CMD_ONETWODIGITS 10 00216 #define RC5_CMD_STANDBY 12 00217 #define RC5_CMD_MUTE 13 00218 #define RC5_CMD_PRESET 14 00219 #define RC5_CMD_DISPLAY 15 00220 #define RC5_CMD_VOLUME_UP 16 00221 #define RC5_CMD_VOLUME_DOWN 17 00222 #define RC5_CMD_BRIGHT_UP 18 00223 #define RC5_CMD_BRIGHT_DOWN 19 00224 #define RC5_CMD_COLOR_UP 20 00225 #define RC5_CMD_COLOR_DOWN 21 00226 #define RC5_CMD_BASS_UP 22 00227 #define RC5_CMD_BASS_DOWN 23 00228 #define RC5_CMD_TREBLE_UP 24 00229 #define RC5_CMD_TREBLE_DOWN 25 00230 #define RC5_CMD_BALANCE_LEFT 26 00231 #define RC5_CMD_BALANCE_RIGHT 27 00232 #define RC5_CMD_CONTRAST_UP 28 00233 #define RC5_CMD_CONTRAST_DOWN 29 00234 #define RC5_CMD_PROGRAM_UP 32 00235 #define RC5_CMD_PROGRAM_DOWN 33 00236 #define RC5_CMD_ALTERNATE 34 /*P<P swap last channel */ 00237 #define RC5_CMD_LANGUAGE 35 00238 #define RC5_CMD_EXPAND 36 00239 #define RC5_CMD_TIMER 38 00240 #define RC5_CMD_STORE 41 00241 #define RC5_CMD_CLOCK 42 00242 #define RC5_CMD_FINETUNE_PLUS 43 /* expand text-tv */ 00243 #define RC5_CMD_FINETUNE_MINUS 44 /* ? text-tv */ 00244 #define RC5_CMD_CROSS 45 /* X text-tv */ 00245 #define RC5_CMD_MIX 46 /* mix text-tv */ 00246 #define RC5_CMD_PAUSE 48 00247 #define RC5_CMD_FAST_REVERSE 50 00248 #define RC5_CMD_FAST_FORWARD 52 00249 #define RC5_CMD_PLAY 53 00250 #define RC5_CMD_STOP 54 00251 #define RC5_CMD_RECORD 55 00252 #define RC5_CMD_SWITCH 56 /*swap screens*/ 00253 #define RC5_CMD_MENU 59 00254 #define RC5_CMD_TEXT 60 00255 #define RC5_CMD_SYSTEM_SELECT 63 00256 00257 #endif 00259 #endif /*__DEV1000_H__*/