The new VS1063a Datasheet adds VS8063a as one variant, and adjusts minimum encoder/decoder delays.

VS1003B-LK has been qualified for the same CVDD limits as VS1003B-L and VS1003B-B. Because of this, the more strict CVDD limits for VS1003B-LK have been removed from the new datasheet.

The VSDSP4 User's Manual has been updated. This manual explains the inner workings of the VSDSP4 processor core.

VS1011e Datasheet / Specification Change Notification changes the lower digital voltage limit to 2.75 V when XTALI <= 13 MHz, and DVDD < 2.8 V, and the VS1011e internal clock doubler is in use. Other use cases are unaffected.

VS1011e Datasheet has been updated to version 1.20 to reflect this change.

The new revision of the VS1063 AEC (Acoustic Echo Cancellation) appnote corrects one register error. See the document itself for details.

The new revision of the VS1063 AEC (Acoustic Echo Cancellation) appnote shortly explains how to test that AEC is running. It also shows a case study on how to improve acoustic design.

The new minor release of the VS1005g Datasheet clarifies a few registers and offers a top and bottom photo of the chip.